JPS6128319Y2 - - Google Patents
Info
- Publication number
- JPS6128319Y2 JPS6128319Y2 JP1984139474U JP13947484U JPS6128319Y2 JP S6128319 Y2 JPS6128319 Y2 JP S6128319Y2 JP 1984139474 U JP1984139474 U JP 1984139474U JP 13947484 U JP13947484 U JP 13947484U JP S6128319 Y2 JPS6128319 Y2 JP S6128319Y2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- voltage
- node
- terminal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2015—Redundant power supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/141—Battery and back-up supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
- G11C5/146—Substrate bias generators
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
- Power Sources (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/119,538 US4337524A (en) | 1980-02-07 | 1980-02-07 | Backup power circuit for biasing bit lines of a static semiconductor memory |
US119538 | 1980-02-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60123798U JPS60123798U (ja) | 1985-08-21 |
JPS6128319Y2 true JPS6128319Y2 (en]) | 1986-08-22 |
Family
ID=22384955
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56500732A Pending JPS57500179A (en]) | 1980-02-07 | 1981-02-04 | |
JP1984139474U Granted JPS60123798U (ja) | 1980-02-07 | 1984-09-17 | 静的半導体記憶装置のビツト線をバイアスするためのバツクアツプ電力回路 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56500732A Pending JPS57500179A (en]) | 1980-02-07 | 1981-02-04 |
Country Status (7)
Country | Link |
---|---|
US (1) | US4337524A (en]) |
JP (2) | JPS57500179A (en]) |
CA (1) | CA1166352A (en]) |
DE (1) | DE3134436C2 (en]) |
FR (1) | FR2475779A1 (en]) |
GB (1) | GB2082415B (en]) |
WO (1) | WO1981002357A1 (en]) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6022438B2 (ja) * | 1980-05-06 | 1985-06-01 | 松下電器産業株式会社 | 不揮発性メモリのリフレッシュ方式 |
US4422163A (en) * | 1981-09-03 | 1983-12-20 | Vend-A-Copy, Inc. | Power down circuit for data protection in a microprocessor-based system |
US4445198A (en) * | 1981-09-29 | 1984-04-24 | Pitney Bowes Inc. | Memory protection circuit for an electronic postage meter |
US4506323A (en) * | 1982-03-03 | 1985-03-19 | Sperry Corporation | Cache/disk file status indicator with data protection feature |
US4439804A (en) * | 1982-03-22 | 1984-03-27 | Rca Corporation | Protection circuit for memory programming system |
US4578774A (en) * | 1983-07-18 | 1986-03-25 | Pitney Bowes Inc. | System for limiting access to non-volatile memory in electronic postage meters |
JPS6159688A (ja) * | 1984-08-31 | 1986-03-27 | Hitachi Ltd | 半導体集積回路装置 |
US4701858A (en) * | 1984-12-31 | 1987-10-20 | Energy Optics Inc. | Nonvolatile realtime clock calendar module |
JPS6238591A (ja) * | 1985-08-14 | 1987-02-19 | Fujitsu Ltd | 相補型の半導体メモリ装置 |
US4730121B1 (en) * | 1987-03-11 | 1998-09-15 | Dallas Semiconductor | Power controller for circuits with battery backup |
JPS6441519A (en) * | 1987-08-07 | 1989-02-13 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPH04205992A (ja) * | 1990-11-30 | 1992-07-28 | Mitsubishi Electric Corp | 入力バッファ回路,入出力バッファ回路及び携帯形半導体記憶装置 |
KR0164814B1 (ko) * | 1995-01-23 | 1999-02-01 | 김광호 | 반도체 메모리장치의 전압 구동회로 |
US6801025B2 (en) * | 2002-11-07 | 2004-10-05 | International Business Machines Corporation | Method and apparatus for control of voltage regulation |
TWI545564B (zh) * | 2015-03-24 | 2016-08-11 | 國立成功大學 | 一種非揮發性靜態隨機存取記憶體 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3274444A (en) * | 1963-04-17 | 1966-09-20 | Sperry Rand Corp | Signal responsive apparatus |
US3859638A (en) * | 1973-05-31 | 1975-01-07 | Intersil Inc | Non-volatile memory unit with automatic standby power supply |
DE2415029B2 (de) * | 1974-03-28 | 1977-01-20 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Gegen spannungsausfall gesichertes speichersystem |
JPS5517990B2 (en]) * | 1974-08-12 | 1980-05-15 | ||
US4122359A (en) * | 1977-04-27 | 1978-10-24 | Honeywell Inc. | Memory protection arrangement |
-
1980
- 1980-02-07 US US06/119,538 patent/US4337524A/en not_active Expired - Lifetime
-
1981
- 1981-02-04 JP JP56500732A patent/JPS57500179A/ja active Pending
- 1981-02-04 DE DE19813134436 patent/DE3134436C2/de not_active Expired
- 1981-02-04 GB GB8130209A patent/GB2082415B/en not_active Expired
- 1981-02-04 WO PCT/US1981/000148 patent/WO1981002357A1/en active Application Filing
- 1981-02-06 CA CA000370330A patent/CA1166352A/en not_active Expired
- 1981-02-06 FR FR8102331A patent/FR2475779A1/fr active Granted
-
1984
- 1984-09-17 JP JP1984139474U patent/JPS60123798U/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
GB2082415B (en) | 1983-08-03 |
CA1166352A (en) | 1984-04-24 |
WO1981002357A1 (en) | 1981-08-20 |
FR2475779A1 (fr) | 1981-08-14 |
JPS57500179A (en]) | 1982-01-28 |
JPS60123798U (ja) | 1985-08-21 |
DE3134436T1 (en]) | 1982-06-03 |
DE3134436C2 (de) | 1987-08-20 |
GB2082415A (en) | 1982-03-03 |
FR2475779B1 (en]) | 1985-03-22 |
US4337524A (en) | 1982-06-29 |
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